Intel scores Knights Corner win in Stampede

Intel has announced the first large-scale deployment of its Many Integrated Cores - MIC - architecture devices, with the University of Texas taking delivery of the first production run to build a 10 petaflop supercomputer.

Dubbed Stampede, the system won't rely entirely on Intel's latest invention: university officials have explained that the supercomputer, which will be built from a few thousand Dell 'Zeus' servers, will merge Intel's Knights Corner MIC-based accelerator boards with as-yet unreleased eight-core Xeon E5-series Sandy Bridge EP processors and Nvidia's Quadro pro-range graphics card boards.

Unlike other supercomputers in the Top500, however, the GPUs won't be used to provide compute power: Stampede will be getting an estimated two petaflops from the Xeon CPUs and a further eight petaflops from the Knights Corner boards, with the Nvidia Quadra boards merely being used for data visualisation.

"Stampede will be one of the most powerful systems in the world and will be uniquely comprehensive in its technological capabilities," claims Jay Boisseau, director of the Texas Advanced Computing Centre based at the university. "Many researchers will leverage Stampede not only for massive computational calculations, but for all of their scientific computing, including visualisation, data analysis, and data-intensive computing. We expect the Stampede system to be a model for supporting petascale simulation-based science and data-driven science."

Intel, naturally, is made up: while it's been showing off its Knights Ferry and Knights Corner products for a while - even giving us a hands-on at the International Supercomputer Conference earlier this year - it's been short on large-scale projects to discuss.

Knights Corner is part of Intel's Many Integrated Cores programme, which looks to move researchers away from using massively parallel GPUs - which Intel does not build - for supercomputer applications and towards a 50-core 22nm many-core PCI Express add-in board produced by Intel.

It's something which is likely to win Intel some friends in the supercomputer world: there's a general trend to move towards CPU rather than GPU processing, with the current leader of the Top500 - the eight petaflop Riken K-Computer - doing its work purely on Sun's CPU technology.

Intel's MIC programme has another trick up its sleeve: its programming model is based on x86, offering a familiar programming environment for those looking to port projects to the new architecture. "MIC offers a sort of fast-path to quickly get codebases up and running on the device, and we're able to continue to use methods of task parallelisation that we've used on shared memory systems for a decade," NCSA manager Mike Showerman told thinq_ at ISC, after having access to two early prototype boards.

"This is an exceptional announcement," crows Intel director Joe Curley, "as those 10 Petaflops will be delivered entirely by Intel technology. We believe the decision to build 'Stampede' based on Intel Xeon E5 processor and the Intel MIC architecture based 'Knights Corner' is a recognition of the advantages that standardised, high-level CPU programming models bring to developers of highly-parallel computing workloads.

"Being able to run the same code on both Intel Xeon processors and 'Knights Corner' co-processors should allow developers to reuse their existing code and programming expertise which leads to greater productivity," Curley claims. "Also, since Knights Corner is based on fully programmable Intel processors, it can run complex codes that are very difficult to program on more restrictive accelerator technologies."

It'll be a while before Intel has real figures to show prospective MIC adopters, however: Stampede isn't due to go into service until 2013, at which point a project will begin to increase the performance still further to a total of around 15 petaflops using future-generation Intel parts.