Intel Unveils 22nm 300mm Silicon Wafer

Intel has shown who's the big daddy of semiconductors today at its Intel Developer Forum today as its president, Paul Otellini, showed a 22nm silicon wafer.

The piece of semiconductor, encased in between two sheets of what looked like perspex, contained SRAM memory and logic circuits which will be at the core of Intel's next generation CPUs.

The CEO of Intel enthusiastically said that "Moore's Law is alive and thriving", adding that "we're already moving ahead with development of our 22nm manufacturing technology and have built working chips that will pave the way for production of still more powerful and more capable processors."

According to Mark Bohr, a Senior Fellow at Intel, the wafer packed trillions of transistors with the surface area of one finger nail holding around 3 billion of them. Intel said that each single transistor measured only 0.092 square microns making it the smallest transistor ever released.

Hexus reports that Intel built a "22nm third-generation high-k metal-gate SRAM test circuit" that packed 364 million bit, that's 45.5MB worth of ultra high speed cache.

22nm was supposed to be reached by semiconductor companies in 2011 to 2012, which means that Intel is well ahead of the curve with this manufacturing process. 22nm Products though are not expected to be announced before 2011.

In August 2008, a consortium of semiconductor companies including AMD, IBM and Freescale presented a 300mm wafer containing 22nm SRAM cells.

Our Comments

Back in 2001, Intel announced plans for a 15nm device - for 2009 - and on one of the slides shows that it will have one Atom product using this manufacturing process in the next few years. This means that Intel is late - according to its own plans - by around 5 years or so.

Related Links

Intel demos first 22nm silicon


Analysis: How ready is Intel with 22-nm platform?


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Intel divulges details on 22nm chips

(The Register)

IDF 2009 - Intel Shows off 22nm & 32nm, Sandy Bridge Demoed

(PC World)