IBM launches eight-core Power7 chip

IBM today launches its hotly-anticipated cell-based, eight-core Power7 processor and is claiming bragging righhs over its ability to run four threads per core.

New servers systems based on the chip will be shown off in New York today in an event believed to have been brought forward with half an eye on a Sun-powered Oracle.

IBM has given details of the chip to the Blue Waters supercomputer project. The design is a development of the Cell processor built for the Sony Playstation.

IBM said each of the eight core provides 12 execution units and can perform up to four fused multiply-adds per cycle. Simultaneous multi-threading delivers up to four virtual threads per core. The cores will have clock frequency in the 3.5-4 GHz range.

Intel's Xeon chip generally runs two threads per core while AMD says that running more than one thread per core causes delays.

The Power7 chip has three levels of cache—private L1 (32KB) instruction and data caches, private L2 (256KB) cache and on-chip L3 (32 MB) cache that can be used either as shared cache or separated into dedicated caches for each core—reducing latency.

It uses the low-power attributes of eDRAM (for the L3 cache) with the speed and bandwidth advantages of SRAM (for the L1 and L2 caches) and two dual-channel DDR3 memory controllers, delivering up to 128 GB/sec peak bandwidth (0.5 Byte/flop). The design supports up to 128GB DDR3 DRAM memory per processor.

The full Blue Waters supercomputer will run more than 200,000 cores.

Servers being shown off today and shipping later this month feature 32 or 64 cores in four and eight-chip combinations.