Skip to main content

Intel announces tri-gate transistor breakthrough

Intel has kindly let us in on the big secret surrounding its press briefing event tonight, and it's major news indeed: the company has revealed that its Ivy Bridge processor line will feature 3D circuitry based around the company's tri-gate transistor technology.

The parts, which were long known to be built on a 22nm process size, will use the tri-gate technology to offer vastly improved performance within the same TDP as current Sandy Bridge processors - or, alternatively, draw significantly less power for the same performance.

"Intel's scientists and engineers have once again reinvented the transistor, this time utilising the third dimension," Intel's chief Paul Otellini crowed at the event. "Amazing, world-shaping devices will be created from this capability as we advance Moore’s Law into new realms" - and, to prove a point, the company even trotted out a quote from the man himself claiming that tri-gate technology represents "a truly revolutionary approach" to chip design.

The below images, with standard planar transistors on the left and the new tri-gate transistors on the right, demonstrate just what they're talking about.

Tri-gate technology differs from traditional planar transistors by using clever intersections to form conducting channels on three sides of a vertical 'fin' of silicon - providing fully depleted operation, and the what can be fairly described as the first commercial 3D semiconductor. While not the first manufacturing technique to produce fully depleted transistors - that honour goes to FDSOI, which Intel doesn't use - it is the cheapest, coming in at a cost premium of around two to three per cent, compared to around 10 per cent for competing technologies.

As well as costing less than competing technologies, tri-gate promises some impressive performance gains. Intel claims that low-voltage performance is increased by 37 per cent over competing technologies, with a power reduction at constant performance of greater than 50 per cent.

Although the technology will first appear in the company's mainstream parts, that halving of power draw will prove extremely useful in one particular area: Intel's battle with British chip giant ARM in the mobile space. While Intel's current Atom chips are still too power-hungry to compete with ARM's elegant low-power designs, a halving of power draw without sacrificing performance could be the boost Intel needs to really start competing.

The chips, which will be manufactured at the company's plants in Oregon, Israel, and Arizona, promise to be something impressive. While the company publicly announced that it was working on tri-gate technology back in 2006, Otellini confirmed today that it's something the company has been looking in to since 2002 when it created a prototype single-fin transistor, which led to a multi-fin prototype a year later followed by the first 3D SRAM cells in 2006.

Intel's competitors are also working on tri-gate-like technologies, of course - but Otellini claims that his company's work gives it at least a three year head start over rival chip-makers, and in the world of semiconductors that represents several lifetimes.

With parts due later this year - and rumblings of demonstrations at this year's Computex event at the end of the month - we won't have long to wait to see if Intel's wonder technology can truly deliver.

For those confused about the benefits of a shrink to 22nm and the use of tri-gate transistors, Intel has provided an ever-so-slightly patronising little video.