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IBM aims at 3D processors with fluidic network

Engineers at IBM have unveiled their latest attempt at an entirely new design of processing, stacking silicon wafers connected by a fluid-based network to form the first true 3D processors.

The company's research suggests that it will be feasible to produce a stack of a several hundred wafers, producing a semiconductor that extends vertically as well as horizontally. The result is a chip that packs far more technology into a small space than ever before.

The research, led by Bruno Michel, uses a dual fluidic network design to achieve its goal. The first network uses a charged fluid to power the processor, while the second takes the same fluid away to dissipate heat generated by the chips.

The result, Michel claims, is a chip that can be powered by its own cooling system, opening the way for high-performance ultra-dense processors for future supercomputers - and, eventually, consumer-grade products.

IBM isn't the only company looking at 3D processor design: chip giant Intel's next-generation Ivy Bridge processors include tri-gate transistor technology, which maintains performance while dropping the heat output - as measured in the Thermal Design Profile, or TDP - by around 50 per cent compared to a standard chip.

IBM's vision is somewhat larger, however: rather than a single layer of upright transistors, Michel's design comprises hundreds of layers of transistors - something that could prove a boon for those interested in many-core design methodologies.

More details on Michel's research is available from New Scientist (free registration required.) monitors all leading technology stories and rounds them up to help you save time hunting them down.