Semiconductor start-up SuVolta has joined forces with IT giant Fujitsu to release a new transistor technology capable of dropping the power consumption of integrated circuits by 50 per cent without harming performance.
Dubbed Deeply Depleted Channel, or DDC, and forming part of the company's PowerShrink low-power complimentary metal-oxide semiconductor (CMOS) platform, the technology is designed to reduce threshold voltage variability and to enable continued CMOS scaling.
The DDC technology works by forming, as the name suggests, a deeply depleted channel when a voltage is applied to the gate. In a typical implementation the DDC channel has several regions: an undoped or very lightly doped region, a VT setting offset region and a screening region. Each implementation of SuVolta's DDC transistor may vary depending on the wafer fabrication facility and specific chip design requirements.
The undoped or very lightly doped region removes dopants from the channel which allows for a deeply depleted channel. This reduces random dopant fluctuation (RDF) thereby enabling VDD scaling and improved mobility for increased effective current.
The VT setting offset region sets the transistor threshold voltage levels, without degrading channel mobility. This region also improves sigma VT over conventional transistors.
The screening region screens the charge and sets the depletion layer depth. It also serves as a body for dynamic VT adjustment through biasing, if desired.
As a result, the company claims, chips designed using SuVolta's DDC technology can drop power demand by between 30 and 50 per cent with no impact on performance while benefiting from significantly lower leakage - vital for shrinking process sizes below 20nm - and improved yields per wafer.
"There are times when making chips smaller just doesn't make sense anymore. Increased lithography costs are inciting the end of Moore's Law because the cost per transistor is plateauing. We are approaching that time now with 28nm and 20nm which I believe will be long-lived nodes," claimed Dr. Scott Thompson, SulVolta's chief technical officer, at the announcement.
"Aside from microprocessors, most of the chips for the mobile market put a premium on cost control and low-power consumption. SuVolta's DDC structure is unique in that it is the only transistor approach that is fully compatible with today's CMOS process integration and fab facilities, and that enables semiconductor companies to retain their existing circuit intellectual property."
Presenting the technology in tandem with partner Fujitsu at the International Electron Devices Meeting in Washington D.C., the company claimed chips featuring the DDC technology would reach the market by the second half of 2012.